Operation

Delay on operate timing cycle begins upon application of input power. The relay contacts transfer at the end of the delay period and will remain transferred until input voltage is removed. Reset occurs when input voltage is removed

 

• Solid state CMOS digital circuitry
• Delay on operate timing mode
• DPDT (2 form C) isolated 10 ampere relay contacts
• Timing selection: 5 position binary coded Dip Switch plus vernier knob adjustment
• Twenty overlapping timing ranges covering .25 secs. to 160 hours.
• UL File#E96739 (M)
• CSA File #LR62586

Documents and Downloads

Document	File Type	File Size	Download
SWPDC Series Datesheet	PDF	536 KB